SiO₂ · Si₃N₄ · Al₂O₃ · MetalsCoating Materials
Thermal · LPCVD · PECVD · ALDDeposition Methods
1nm–10μmFilm Thickness Range
100mm–300mmWafer Diameters

Overview

Many semiconductor and MEMS fabrication processes begin not with bare silicon, but with a pre-coated substrate — a wafer that already carries the first dielectric, metal, or conductive oxide layer your process requires. Starting from a pre-coated substrate eliminates deposition variability from your critical path, reduces your in-house tool loading, and ensures consistent lot-to-lot film quality.

GINECHIP supplies pre-coated substrates across the full materials spectrum: thermal SiO₂ for CMOS-compatible starting material, LPCVD Si₃N₄ for MEMS membranes and hard masks, PECVD dielectrics for low-temperature interlayer and passivation films, ALD ultra-thin films for advanced gate stacks and barrier layers, sputtered metals (Al, Au, Pt, Ti, Cr, Ni, Cu) for electrodes and seed layers, and TCO films (ITO, AZO) for transparent electrode applications. Every coated wafer ships with full film metrology — thickness, refractive index, stress, and uniformity data.

Coating Portfolio

Thermal Oxide (SiO₂) on Silicon

High-quality silicon dioxide grown via dry or wet thermal oxidation in a diffusion furnace. The most fundamental and widely used coated substrate — serving as a diffusion mask, gate dielectric, isolation layer, etch-stop, and passivation film. Dry oxidation (O₂, 850–1100°C) yields dense, high-breakdown-strength films; wet oxidation (H₂O vapor, 900–1100°C) achieves faster growth rates for thicker films up to several microns.

Growth: Dry or Wet ThermalThickness: 10nm–4μmUniformity: < 2% (1σ)Breakdown: > 10 MV/cm (dry)Refractive index: 1.46Wafer: 100mm–300mm

LPCVD Silicon Nitride (Si₃N₄)

Stoichiometric silicon nitride deposited via low-pressure CVD at 700–850°C. Offers superior barrier properties against moisture, sodium ions, and oxidizing species. Stoichiometric Si₃N₄ (Si₃N₄ / Si-rich SiNx options) provides excellent chemical resistance and high Young's modulus — essential for MEMS membranes, hard masks, and passivation layers.

Process: LPCVD, DCS/NH₃ or SiH₄/NH₃Thickness: 20nm–1μmStoichiometric or Si-richStress: tensile 0.8–1.2 GPaRI: 2.0 (stoichiometric)Wafer: 100mm–200mm

PECVD Dielectrics (SiO₂, SiNx, SiON)

Plasma-enhanced CVD enables low-temperature (150–400°C) deposition of dielectrics — compatible with post-metallization passivation, interlayer dielectrics on temperature-sensitive substrates, and anti-reflection coatings. SiNx films with tunable compressive/tensile stress for MEMS device engineering; SiON with graded refractive index for optical waveguide cladding.

Process: PECVD, 150–400°CSiO₂, SiNx, SiON optionsThickness: 10nm–5μmTunable stress: −1.5 to +1.0 GPaRI: 1.45–2.1 (SiON gradable)Wafer: 100mm–300mm

Atomic Layer Deposition (ALD) Films

Conformal, pinhole-free dielectric and metal films deposited one atomic layer at a time. Self-limiting surface reactions achieve unmatched thickness control (±0.1nm) and step coverage (> 99%) on ultra-high-aspect-ratio structures. Key films: Al₂O₃ (high-k gate dielectric, moisture barrier), HfO₂ and ZrO₂ (advanced gate dielectrics), TiO₂ (AR coating, photocatalyst).

Films: Al₂O₃, HfO₂, ZrO₂, TiO₂, Ta₂O₅Thickness: 1nm–200nmConformality: > 99% (AR > 100:1)Uniformity: < 1% (1σ)Thermal & Plasma-Enhanced ALDWafer: 100mm–300mm

Metal-Coated Wafers

PVD sputtered or evaporated metal films on silicon, glass, or ceramic substrates. Aluminum (Al, AlSi, AlCu) for CMOS metallization and reflectors; Titanium/Gold (Ti/Au) for MEMS electrodes, bio-sensor contacts, and wire bonding pads; Platinum (Pt) for high-temperature electrodes and catalytic surfaces; Chromium (Cr) for adhesion layers and photomask blanks.

Metals: Al, Au, Pt, Ti, Cr, Ni, Cu, AgStacks: Ti/Au, Cr/Au, Ti/Pt, TiW/CuThickness: 10nm–10μmAdhesion layer optimized per metalLift-off or etch patterningWafer: 100mm–300mm

Transparent Conductive Oxide (TCO)

ITO (Indium Tin Oxide), AZO (Al-doped ZnO), and FTO (F-doped SnO₂) films combining high optical transparency (> 85% in visible) with low sheet resistance (10–100 Ω/sq). Essential for touch panels, flat-panel displays, solar cell transparent electrodes, and electro-optic modulator electrodes on LiNbO₃ or glass substrates.

Materials: ITO, AZO, FTOTransmission: > 85% (400–700nm)Sheet R: 10–100 Ω/sqThickness: 50–500nmDeposition: DC/RF sputteringWafer: 100mm–200mm

Typical Applications

MEMS &amp; NEMS Devices

Si₃N₄ membranes for pressure sensors and microphones. SiO₂ sacrificial layers for surface micromachining. Al₂O₃ etch-stop layers. Ti/Au electrode metallization for RF-MEMS switches and BAW resonators.

CMOS &amp; IC Fabrication

Thermal SiO₂ gate oxides and field oxides. LPCVD Si₃N₄ spacer and hard-mask layers. PECVD SiO₂ and SiNx interlayer dielectrics and final passivation. ALD high-k gate dielectrics for advanced nodes.

Photonics &amp; Optoelectronics

ITO transparent electrodes for electro-optic modulators and photodetectors. TiO₂/SiO₂ anti-reflection and high-reflection coating stacks. ALD Al₂O₃ for surface passivation of III-V lasers and photodiodes.

Power Electronics

Thick thermal SiO₂ for field-plate dielectrics in SiC MOSFETs. PECVD SiNx for final passivation in GaN HEMTs. ALD Al₂O₃ gate dielectrics for GaN MIS-HEMTs with low interface trap density.

Bio-MEMS &amp; Sensors

Au and Pt thin-film electrodes for electrochemical biosensors and neural interfaces. ALD TiO₂ and Al₂O₃ as biocompatible coatings. Parylene and polyimide organic coatings for implantable device encapsulation.

Advanced Packaging

TiW/Cu and Ti/Cu seed layers for RDL and TSV metallization. PECVD SiO₂ and SiNx for inter-metal dielectrics in fan-out wafer-level packaging. ALD Al₂O₃ moisture barriers for organic substrate protection.

Metrology & Quality Data

Every coated substrate lot includes a comprehensive metrology report: spectroscopic ellipsometry (thickness and refractive index n,k across 190–1700nm, 49-point wafer map), film stress (wafer bow measurement before/after coating via Tencor FLX or equivalent), surface roughness (AFM, 5μm × 5μm scan), particle count (laser surface scanner), and dielectric breakdown strength (for gate oxide and isolation films, per customer specification). Certificate of Conformance included with every shipment.

Custom Film Stacks

Many devices require multi-layer coated substrates. We offer common pre-configured stacks including: ONO (Oxide-Nitride-Oxide) for DRAM capacitor dielectrics and non-volatile memory, thermal SiO₂ + LPCVD Si₃N₄ for LOCOS and STI hard-mask starting material, Ti/Au or Cr/Au bi-layer metallization for MEMS electrodes and wire bonding pads, and SiO₂/TiO₂ multilayer stacks for DBR mirrors and AR coatings. Custom film combinations are available — specify your required stack and our engineers will confirm feasibility and provide a quotation.

Substrate Compatibility

Pre-coated substrates are available on: silicon (CZ, FZ, all diameters 100mm–300mm, all orientations and doping types), SOI (with coating on device layer or handle wafer), glass (fused silica, borosilicate, quartz — for optical and bio-MEMS coatings), compound semiconductors (GaAs, InP, SiC — with temperature-appropriate dielectric and metal coatings), and sapphire (for GaN LED epitaxy with pre-deposited buffer or nucleation layers).

Need Pre-Coated Substrates?

Specify your substrate type, coating material, target thickness, and quantity — our team will provide availability, metrology specifications, and a competitive quotation within 24 hours.

ISO 9001:2015 Full Metrology Data Lot Traceability Custom Stacks